Advanced Semiconductor Process Technologies - 2 DAY WORKSHOP [DAY 2]

MY 5-8 | Level 1A | MITEC Tuesday, May 07
9:00am to 5:00pm
Registration Fee Applicable

* Programs and Topics are subject to change with prior notice.
** Malaysia Companies HRDF Claim (Subject to T&C and please contact HRDF for more information)



Semiconductor processing technologies have advanced rapidly over the last decade, and such is not possible without the continuous improvement in the production tool, and cleanroom control. To attain ULSI and integrated circuits (ICs) with varied functionalities, performances and reliabilities; complex process know-how, advanced fabrication techniques, start-of-the-art technologies, devising of novel devices, and the continuous search for new materials are all inevitable. An in-depth understanding of these deep-submicron process technologies and ULSI devices are definitely crucial, not only for better understanding but also to serve as the essential background for the ever important technology invention and further development in the areas.

What You Will Learn

  • Essential substrate and device electrical properties for continuous engineering improvement
  • Current and future scaling technology challenges in device size, power usage and pricing
  • Substrate preparation technology, layout design processes and cleanroom requirements
  • Advance planar and 3D IC device fabrication technology below 22nm technology node
  • Trends of die packaging and testing include SoC, SiP and 3D integration technology

Course Content For Day 2

Semiconductor Cleanroom Requirements 

  • Semiconductor industry cleanroom standards
  • Cleanroom types and selection of cleanroom filter

Advance Device Fabrication Technologies

  • Lithography technology and advance lithography platform
  • Ion implantation technology and advance ion implanter design
  • Etching technology and advance etching platform for 3D etching
  • Deposition methods include physical, chemical, ALD and thermal oxidation
  • Device fabrication flow using CMOS process as an example

Die Packaging and Testing 

  • Flow of die packaging assembly technology
  • Wafer mounting, dicing, attach and wire bonding technology
  • Evolution of encapsulation, include SoC and SiP package styles for integrated circuit
  • Integrated circuit inspection, die cost and yield

3D Integration Technology 

  • Evolution of 3D integration technology
  • Application and types of silicon interposer and through silicon via technology
  • Introduction of Hybrid Memory Cube (HMC) 3D IC memory chip
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