Semiconductor Yield Management Solutions Forum 2017

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Thursday, 27 April 2017 | 10:00 – 14:45hrs
SPICE Arena (Conference Room 4 & 5, Level 2), Penang, Malaysia


Organised by:



Sponsored by: 









Enhancing Competitive Edge Through Holistic Yield Management Approach



Yield analysis and effective inline defect identification and isolation are critical processes in ensuring high yield and reliability in finished semiconductor products. Complex variability issues that involve interactions between manufacturing process and layout features can mask systematic yield issues. Without improved yield analysis methods, time-to-volume is delayed, mature yield is suboptimal, and product quality may suffer, thereby threatening a manufacturer’s profitability. Yield methodology that leverages inline production test results, volume scan diagnosis, and statistical analysis to identify the cause of yield loss is therefore pertinent to ensuring early extraction of actionable plan to address any excursions. This forum is targeted to delve into the technical forefront of inline yield diagnostics.




Session Chair:

Director, Product Management, Rudolph Technologies Inc, USA



10:00 - 10:05 Welcome Remarks by Session Chair

10:05 - 10:30

The Importance of Digital Threading: Connecting the Dots to Continuously Drive Inline Defectivity Advancements

Mr. Sonu MAHESHWARY, Director, Product Management, Rudolph Technologies Inc, USA

10:30 - 10:55

Defect Inspection for Shrinking RDL Line/Space in High-Density Fan-Out Wafer Level Packaging

Mr. Stephen HIEBERT, Senior Director, Marketing, KLA-Tencor Corporation, USA

10:55 - 11:20

Machine Learning - A Powerful New Class of Tools for Yield Improvement

Mr. Mike ALPERIN,  Manufacturing Industry Consultant, Data Science Team, TIBCO Software Inc, USA

11:20 - 11:35 Break & Networking Time

11:35 - 12:00

In-Line Hybrid Metrology Solutions

Mr. Brad LAWRENCE, Regional Sales & Product Marketing Manager, XwinSys Ltd, Israel

12:00 - 12:25

The 3 Reasons Volume Scan Diagnostics Analysis Emerged as a Critical Component of Yield Ramp in 28nm and Below

Mr. Chan CHEN, Senior Project Manager, Synopsys, Shanghai, China


12:25 - 12:50

Managing Condensable Gases

Mr. Chris O’ROURKE, Applications Manager, Thermal Management Systems, Edwards Ltd, UK​


12:50 - 13:50 Conference Lunch

13:50 - 14:15

Reliable Chip & Bond Wire QA Sampling, Counting & Inspection by Implementing Multiple Magnification AOI

Mr. Sean LEE, Assistant General Manager, SE Asia, Nordson Advanced Technology, Singapore

14:15 - 14:40

Streamline and Automate Engineering Analysis to Improve Yield with Data Collected from Raw Materials Supplier, Process Data and Metrology Data

Mr. Bryan NG, Vice President, Business Development, camLine Pte Ltd, Singapore

14:40 - 14:45 Closing Remarks by Session Chair


Program subject to change without prior notice.


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