Mr. Markus Christian FREI

Markus qualified as electromechanical engineer in 1991. He later received his Bachelor Business in Electronics and Economics in Switzerland and at the University of Liechtenstein. 

30+ years of PVD technology expertise across Semiconductors, Photovoltaics, Functional Coatings, and Optical Disks. Bridging the gap between materials science and industrial-scale manufacturing. 

He joined Evatec as Senior Product Manager (PM) in 2015 with the focus on the development of sputtering tools for wafer level packaging.  He was instrumental in helping the team in Evatec to successfully develop one of the fastest tools with one of the best Rc’s in the market, Hexagon. 

In 2020 Markus became Product Marketing Manager (PMM) in the the business unit Advanced Packaging and Semiconductor focusing on wafer level packaging solutions.

Since 2022 Markus has taken on additional responsibilities for Product Marketing Evatec’s Advanced Packaging Panel Level Solutions where Evatec is the market leader with the largest install base.

Presentation Title

Advancing Thin Film Deposition for Panel-Level Heterogeneous Integration

The industry-wide shift toward Heterogeneous Integration (HI) for high-performance computing (HPC) and AI accelerators is driving a critical transition from Wafer-Level Fan-Out (WL-FO) to Panel-Level Fan-Out (PL-FO). By moving to large-format substrates—ranging from the compact 300×300 mm Q-panel to established 510×515 mm and 600×600 mm formats—manufacturers can significantly enhance substrate utilization and throughput. However, achieving high-yield mass production at this scale requires overcoming significant technical hurdles in thin film deposition.

This presentation highlights the latest advances in Physical Vapor Deposition (PVD), degas, and etch process technologies tailored for panel-scale heterogeneous integration. Central to these advancements is the reliable deposition of Redistribution Layer (RDL) seed layers, typically utilizing a Titanium-Copper (Ti-Cu) sputtered stack. Furthermore, we address the critical need for efficient thermal management in AI chips through the deposition of Backside Metallization (BSM) stacks, which ensure high-conductivity thermal paths for heat spreader attachment.

A primary challenge in panel processing is the high organic content of the substrates, which necessitates rigorous contamination control. We illustrate how effective moisture removal and outgassing are achieved through atmospheric batch degas technology, ensuring superior film adhesion and electrical performance. By optimizing these PVD and pre-treatment workflows, we demonstrate a viable path for scaling advanced packaging solutions from traditional wafers to high-efficiency panel formats.

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