Advanced Packaging & Heterogeneous Integration Summit

Advanced Packaging & Heterogeneous Integration Summit 1 | Topics on Chiplet HI and Panel Level Packaging
Day 0 | Monday, 4 May 2026 | 09:30 - 17:00

Advanced Packaging & Heterogeneous Integration Summit 2 | Topics on Silicon Photonics and Metrology
Day 1 | Tuesday, 5 May 2026 | 13:00 - 17:00

Novel 2, Level 1A, MITEC

As system complexity increases and performance scaling extends beyond traditional Moore’s Law approaches, advanced packaging has become a critical enabler across computing, connectivity, and emerging applications.

This summit will feature four focused topics—Heterogeneous Integration, Panel-Level Packaging, Silicon Photonics, and Metrology—each addressing key technological, manufacturing, and ecosystem challenges across the advanced packaging value chain.

4 May | Heterogeneous Integration Read more

Heterogeneous integration is a central theme of SEMICON’s advanced packaging agenda, redefining how system performance and value are achieved in the post-Moore’s Law era. Rather than relying on monolithic scaling, the industry is increasingly adopting chiplet-based and multi-die architectures that combine logic, memory, RF, analog, and photonics within a single package. This forum will examine how advanced packaging technologies—such as interposers, advanced substrates, TSVs, and hybrid bonding—are enabling high-density interconnects, flexible design partitioning, and faster product innovation cycles. Key discussion areas include co-design methodologies, thermal and power integrity, testing strategies, and ecosystem standards. 

4 May | Panel-Level Packaging Read more

Panel-level packaging (PLP) is emerging as a key inflection point in advanced packaging, delivering higher throughput, better cost efficiency, and broader adoption across semiconductor and electronics markets. PLP enables the industry’s expansion beyond leading-edge logic into automotive, industrial, and consumer applications. This forum will examine how fan-out, RDL-first, and embedded-die architectures are being scaled to large-format panels, along with the materials, equipment, and process innovations needed to manage warpage, uniformity, and yield. Ecosystem alignment across suppliers and standards bodies will be highlighted as essential to accelerating PLP industrialization. 

5 May | Silicon Photonics Read more

Recent advances in silicon photonics are rapidly moving the technology from research to early manufacturing, driven by rising demand for high-bandwidth, energy-efficient interconnects in AI, HPC, and data centers. Innovations in co-packaged optics, advanced modulators, and low-loss waveguides are enabling closer integration of photonics with leading-edge logic. At the same time, packaging approaches such as 2.5D interposers, chiplets, and optical I/O help overcome electrical limits and reduce power. Key challenges—alignment precision, thermal interactions, testing complexity, and supply-chain maturity—remain. This forum will explore how advanced packaging and cross-industry collaboration are paving the way for scalable silicon photonics deployment. 

5 May | Metrology Read more

Metrology has become a critical enabler for advanced packaging as integration complexity, heterogeneous materials, and fine-pitch interconnects push beyond the limits of traditional measurement techniques. This forum will explore advancements in optical, e-beam, hybrid, and AI-assisted metrology that enable precise overlay control, defect detection, and in-line process monitoring for 2.5D, 3D, fan-out, and panel-level packaging. Emphasis will be placed on addressing challenges such as non-planar surfaces, tighter tolerances, and real-time data requirements. Cross-industry collaboration will be highlighted as essential for advancing metrology capabilities to support scalable, high-yield advanced packaging manufacturing.