Dr. Koichi HASEGAWA
General Manager JSR Corporation, Japan
Koichi Hasegawa received Ph.D. degree in engineering from Osaka Prefecture University in 1999. His major at the university was inorganic materials science, especially focusing on sol-gel related materials. He has been working at Fine Electronic Materials Research Laboratories in JSR Corporation Japan, and experienced various kinds of advanced electronic materials development like inorganic low-k dielectrics, plating photoresists, photo-sensitive dielectrics, temporary adhesives, LED related materials, CMP consumables, etc. During his career, he experienced a visiting scientist at University of Illinois at Urbana-Champaign (UIUC) for 2 years, for the research of self-assembly of inorganic spherical particles. From 2015, he has been assigned as a general manager of Device Integration Materials Laboratory in JSR Corporation. His current interests are in novel advanced packaging materials like photoresists for high density wiring and dielectrics for high frequency applications.
Presentation Title:
Key Lithographic Materials Enabling High Density and Low-Loss Advanced Packaging
It has been a long time since the deceleration of Moore's Law has been touted, however, the reality is that there are still no signs that the booming economy of electronics will be overshadowed. Rather, we engineer see only a bright future. The data processing rate required has been increasing exponentially year by year, and it has become an era in which it is not enough to rely only on the two-dimensional miniaturization of wiring density of front-end IC chips. In the current and future semiconductor development, evolution of packaging technology is essential and will become more and more important. Front-end IC design shrinkage is of course still necessary, however, future devices require engineer to consider system-level optimization to maximize their performance. In addition to the fundamental performance like processing rate or storage capacity, we are in an era where evolution as total performance is required, taking into account low power consumption, low cost, environmental compatibility, and so on.
JSR entered the field of semiconductor development industry as an advanced lithography material supplier in early 1970s, and has been brushing up our material technology. In order to further contribute to the ever-evolving semiconductor industry, we are also increasing our focus on advanced packaging technology. Our company is now focusing on two kinds of trend in advanced packaging; how back-end wiring density can be increased, and how low-loss high frequency RF devices can be realized. In this talk, the development status and roadmap of plating photoresists which enable various high-density wiring in complicated advanced packages, and those of photo-imageable low Dk / Df dielectrics which contributes to suppress signal loss of RF devices for 5G / 6G application is presented.