Mr. Favier SHOO
Senior Manager, Strategic Marketing of Packaging Division Applied Materials, Singapore
Favier Shoo is a Strategic Marketing Senior Manager in the Packaging division at Applied Materials. In this role, he is responsible for identifying Semiconductor Packaging trends and inflection opportunities, generating compelling technical business plans and market analysis presentations, and developing strategic goals to meet business objectives.
Prior to joining Applied Materials, Favier was with Yole Développement for three years, leading the Packaging business and producing technology & market reports, quarterly monitors and strategic consulting studies. Before Yole, he was a Customer Application Technologist at Applied Materials for seven years, demonstrating product differentiation for business wins.
Favier holds a Bachelor’s Degree in Materials Engineering (Hons) and a Minor in Entrepreneurship from Nanyang Technological University (NTU) Singapore. Favier was also the co-founder of a startup company where he formulated business goals, revenue models and marketing plans.
Presentation Title:
2.5D/3D Heterogenous Integration Driving Advanced Packaging Technology
Fueled by digital demands of 5G Big Data / High-Performance Computing, Artificial Intelligence - IOT (AIOT), Advanced Packaging technology options are increasingly rich and ground-breaking. The Performance, Power, Area, Cost and Time to market (PPACt) demand at escalating cost and time associated with Moore’s Law scaling has triggered the semiconductor industry to strategize system-level scaling with Advanced Packaging. The industry is now diligently using advanced packaging technologies to put multiple advanced and/or mature chips in a single package.
Advanced packaging has become essential for semiconductor innovation. Leading players are playing on their strengths to innovate. In this presentation, Applied Materials is going to share with you how 2.5D/3D System-level interconnects can be unlocked with Advanced Packaging Technologies. This enables designers to integrate a variety of functional dies with different wafer nodes, wafer sizes etc. into one packaged unit which is unprecedented.